fn6508 rev 4.00 page 1 of 9 february 15, 2013 fn6508 rev 4.00 february 15, 2013 isl1536 dual channel central office adsl2+ line driver datasheet the isl1536 is a very low pow er dual channel differential amplifier designed for central office line driving for dmt adsl2+. this device features a high drive capability of 400ma while consuming only 4m a of supply current per amplifier from 12v supplies. it integrates gain and bias resistors while maintaining high slew rate and low distortion. features ? internal fixed gain a v = 12.85 ? integrated feedback resistors ?43.4v p-p differential output drive into 100 ? ?41.6v p-p minimum differential output drive into 60 ? ? -59dbc typical driver output distortion driving 50 ? at 2mhz ? low quiescent current of 3ma per amplifier ? power-down disable control ? pb-free (rohs compliant) applications ? adsl, adsl2, adsl2+ line drivers ? g.shdsl, hdsl2 line drivers ? video distribution amplifiers ? video twisted-pair line drivers pinout isl1536 (16 ld 4x4 qfn) top view ordering information part number (notes 1, 2, 3) part marking temp. range (c) package (pb-free) pkg. dwg. # ISL1536IRZ 153 6irz -40 to +85 16 ld qfn l16.4x4e ISL1536IRZ-t13* 153 6irz -40 to +85 16 ld qfn l16.4x4e notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plasti c packaged products employ speci al pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus a nneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb-free products are ms l classified at pb-free peak reflo w temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity le vel (msl), please see device information page for isl1536 . for more information on msl, please see tech brief tb363 . *gnd for both single/dual supply ina inb gnd inc ind vbcd discd vs- vbab disab vs+ outa outb nc outc outd 1 2 3 4 12 11 10 9 5 6 7 8 16 15 14 13 thermal pad*
isl1536 fn6508 rev 4.00 page 2 of 9 february 15, 2013 block diagram pin descriptions 16 ld qfn pin name function 1 ina amplifier a input 2 inb amplifier b input 3 gnd ground connection 4 inc amplifier c input 5 ind amplifier d input 6 vbcd voltage bias for amplifier c, d 7 discd enable/disable amplifiers c, d (dsl channel #2) 8 vs- negative supply 9 outd amplifier d output 10 outc amplifier c output 11 nc no internal connection. connect to gnd on pcb. 12 outb amplifier b output 13 outa amplifier a output 14 vs+ positive supply 15 disab enable/disable amplifiers a, b (dsl channel #1). 16 vbab voltage bias for amplifier a, b ina inb logic control logic control disab discd - + a - + b outa outb rf rf 2rg vbab 50k ? vs+ vs- 50k ? 7.5k ? 7.5k ? vs+ vs- gnd inc ind - + c - + d outc outd rf rf 2rg vbcd 50k ? vs+ vs- 50k ? 7.5k ? 7.5k ? 4.8k ? 4.8k ? 4.8k ? 4.8k ? 800 ? 800 ?
isl1536 fn6508 rev 4.00 page 3 of 9 february 15, 2013 important note: all parameters having min/max specifications are guaranteed. typ values are for information purposes only. unles s otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a absolute maximum ratings (t a = +25c) thermal information v s + to v s - supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30v v s + voltage to ground . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to +30v v s - voltage to ground . . . . . . . . . . . . . . . . . . . . . . . . . . -30v to 0.3v input disab, discd to ground . . . . . . . . . . . . . . . . . . . . . . . . . . .7v v in + voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s - to v s + current into any input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8ma continuous output current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75ma esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250v thermal resistance (typical, note 4) ? ja (c/w) 16 lead qfn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 ambient operating temperature range . . . . . . . . . .-40c to +85c storage temperature range . . . . . . . . . . . . . . . . . .-6 0c to +150c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . +150c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 4. ? ja is measured with the component mounted on a high effective the rmal conductivity test board in free air. see tech brief tb379 for details. electrical specifications v s = 12v, r l = 50 ? to gnd, disab = discd = 0, t a = +25c, unless otherwise specified. parameter description conditions min (note 5) typ max (note 5) unit ac performance a v gain 12.6 12.85 13.1 v/v bw -3db bandwidth 50 mhz thd total harmonic distortion f = 1mhz, v o = 10vo p-p - diff, r l = 50 ?? to gnd -69 dbc f = 2.2mhz, v o = 10vo p-p - diff, r l = 50 ?? to gnd -59 dbc sr slew rate, single-ended signal v out from -4.5v to +4.5v 200 400 v/s dc performance v os-dm differential mode offset voltage -50 +50 mv v os-cm common mode offset voltage -125 125 mv input characteristics i b + non-inverting input bias current -5 +5 a e n input noise voltage f = 10khz 8.0 nv ? hz i n + +input noise current f = 10khz 1.0 pa/ ? hz rin input resistance 67.59k ? v ih input high voltage dis inputs 2.2 v v il input low voltage dis inputs 0.8 v i ih input high current for dis dis = 5v 20 58 100 a i il input low current for dis dis = 0v -25 -7 0 a output characteristics v out -50 loaded output swing single-ended r l = 50 ? to gnd 10.4 10.85 v v out -30 loaded output swing single-ended r l = 30 ? to gnd 9.8 10.4 v v out -dis disable output voltage 800 mv i out output current r l = 0 ? 600 ma
isl1536 fn6508 rev 4.00 page 4 of 9 february 15, 2013 supply characteristics v s(max) maximum operating supply voltage 13.2 v v s(min) minimum operating supply voltage 7.5 v i s + (enable) positive supply current per amplifier all outputs at 0v, dis = 0 v4.05ma i s - (enable) negative supply current per amplifier all outputs at 0v, dis = 0 v -4.85 -3.9 ma i s + (power down) positive supply current per amplifier all outputs at 0v, dis = 5 v 0.3 0.75 ma i s - (power down) negative supply current per amplifier all outputs at 0v, dis = 5 v -0.75 0 ma i gnd gnd supply current per amplifier all outputs at 0v 0.3 ma note: 5. compliance to datasheet limits is assured by one or more meth ods: production test, charac terization and/or design. electrical specifications v s = 12v, r l = 50 ? to gnd, disab = discd = 0, t a = +25c, unless otherwise specified. (continued) parameter description conditions min (note 5) typ max (note 5) unit typical performance curves figure 1. differential frequency response vs r l figure 2. differential frequency response vs r l figure 3. differential frequency response vs c l figure 4. differential frequency response vs c l v s = 12v c l = 0pf r l = 100 ? r l = 1k ? r l = 25 ? r l = 50 ? ? ? ?? ? ? ? r l = 100 ? r l = 50 ? r l = 1k ? ? ? ?? ? 68pf 47pf 0pf 10pf v s = 6v r l = 100 ? 68pf 10pf 0pf 47pf
isl1536 fn6508 rev 4.00 page 5 of 9 february 15, 2013 figure 5. 200khz 2nd and 3rd harmonics vs differential output voltage figure 6. 1mhz 2nd and 3rd harmonics vs differential output voltage figure 7. 2.2mhz 2nd and 3rd harmonics vs differential output voltage figure 8. psrr vs frequency figure 9. supply current vs supply voltage (all amplifiers enabled) figure 10. output impedance vs frequency typical performance curves (continued) hd3 hd2 v s = 12v r l = 100 ?? diff v s = 12v r l = 100 ?? diff hd3 hd2 v s = 12v r l = 100 ?? diff hd3 hd2 psrr- psrr+ (?v s
isl1536 fn6508 rev 4.00 page 6 of 9 february 15, 2013 figure 11. differential 3db bandwidth vs supply voltage figure 12. channel separation vs frequency figure 13. package power dissipation vs ambient temperature figure 14. package power dissipation vs ambient temperature typical performance curves (continued) (?v s 833mw ? ja = +150c/w qfn16 jedec jesd51-3 low effective thermal conductivity test board - thermal pad not connected to board 0 50 125 150 ambient temperature (c) 1.2 1.0 0.4 0 power dissipation (w) 0.8 0.6 85 25 75 100 0.2 jedec jesd51-7 high effective thermal conductivity test board - exposed diepad soldered to pcb per jesd51-5 3.125w ? ja = +40c/w qfn16 050 125 150 ambient temperature (c) 4.5 4.0 1.5 0 power dissipation (w) 3.5 2.5 85 25 75 100 0.5 3.0 2.0 1.0
isl1536 fn6508 rev 4.00 page 7 of 9 february 15, 2013 applications information product description the isl1536 consists of two set s of high-power line driver amplifiers that can be connected for full duplex differential l ine transmission. the amplifiers are designed to be used with adsl2+ signals up to 2.2mhz. each amplifier has identical positive gain connections resul ting in optimum common-mode rejection. a typical interface c ircuit configuration is shown i n figure 15. integrated components isl1536 integrates bias and feedback resistors, minimizing the number of external compone nts. the gain is fixed at +12.85v/v. the vbab and vbcd pins also integrate a pair of 7.5k ? and 50k ? resistors on each port to bia s the line driver for single and dual supply usage. when powe ring the line driver with a single supply, vbab a nd vbcd pins are floa ted. when using dual supplies, vbab and vbcd pins are grounded. integration of these components in the line driver minimizes assembly cost and board space. impedance matching r b in figure 15 depends on the line impedance and transformers turns ra tio. line impedance is characterized to be 100 ?? across tip and ring. if a 1 :n tranformer is used, r b can be calculated according to equation 1: - + - + - + - + receiver output - receiver output + driver input r g* r f* r f* r f r r in r r in r f r b r b tip ring receive amplifiers z line *values are internally set for line driver driver input figure 15. typical interface circuit configuration rb 100 n 2 --------- - 0.5 ? = ?? ?? (eq. 1)
fn6508 rev 4.00 page 8 of 9 february 15, 2013 isl1536 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2008-2013. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. revision history date revision change november 20, 2012 fn6508.4 added note 3 to ordering information on page 1. changed hbm from 3kv to 4kv in absolute maximum ratings on pa ge 3. changed mm from 300v to 250v in a bsolute maximum ratings on p age 3 added note 5 to electrical spe cifications table on page 4. march 8, 2010 fn6508.3 on page 4, changed the maximum operating s upply voltage typ from 12.6v to 13.2v february 8, 2010 on page 3 in the electrical specifications tab le, changed v out -dis max spec from 300mv to 800mv may 29, 2009 added revision history beginning from rev 3. changed the logic high level (vih) on page 3 from min 2.0v to mi n 2.2v, which is consistent with the intended applications (afe output logic high levels are typically at 3.3 v with 2.4v minimum) while providing added margin to internal threshold variation. on page 1 in the first paragraph, changed: "this device feature s a high drive capability of 400ma while consuming only 3ma..." to "this device features a high drive ca pability of 400ma while consuming only 4ma...". added theta ja and applicable note to thermal information on page 3. removed vs, supply voltage row in spec table. added maximum and minimum operating supply voltages (v s(max) and v s(min) ) with typical specs of 12.6v and 7.5v to supply characteris tics on page 4. added disab = discd = 0 to el ectrical specifications table common conditions.
isl1536 fn6508 rev 4.00 page 9 of 9 february 15, 2013 package outline drawing l16.4x4e 16 lead quad flat no-lead plastic package rev 0, 4/0 8 located within the zone indicate d. the pin #1 identifier may be unless otherwise specified, t olerance : decimal 0.05 tiebar shown (if present) i s a non-functional feature. the configuration of the pin #1 identifier is optional, but mus t be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" typical recommended land pattern top view bottom view side view 2 . 50 0 . 05 see detail "x" 0.30 0 . 05 base plane pin #1 index area 5 8 ( 3 . 8 typ ) ( 2 . 50 typ ) ( 12x 0 . 65 ) ( 16x 0 .30 ) ( 16 x 0 . 6 ) 0 . 9 0 . 1 16x 0 . 4 0 . 05 0 . 2 ref 0 . 00 min. 0 . 05 max. c 5 4 0.10 c m index area (4x) 0.15 pin 1 6 4.00 12 4.00 9 a b 4 0.65 12x 13 4x 1.95 16 1 6 0.08 c c seating plane 0.10 c ab
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